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Low Power Design Services
Objective:
Manage the challenge to conceive and
implement an optimal block level architecture while
maintaining the three main design constraints of
power, performance and area.
Process:
ChipVision first assists in the identification
of power hungry, data flow dominated blocks in your
existing SoC designs.
We either create or import
an ANSI C or SystemC description of the block being
specified into our PowerOpt software. We then analyze
the code and determine all the processes in the
design, all the arithmetic operations and the dependencies
in the data path. A test bench or stimulus is then
applied to the design to measure the activity
generated by each operation.
At this stage we apply
constraints to the design to begin the exploration
process. To facilitate this step, PowerOpt is fed
information about the downstream physical design
process so that power values can be extracted and
used to estimate the energy dissipated by
the design. After exploring multiple options,
we select the optimal configuration for the design. For
a full turnkey design, we will develop the RTL
for you.
Result:
A fully optimized low power implementation of a critical block in your latest SoC.
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